作者
Ferlini Frederico
Viel Felipe
Seman Laio Oriel
Pettenghi Hector
Bezerra Eduardo Augusto
Leithardt Valderi Reis Quietinho
单位
System & Verification Group, Cadence Design Systems GmbH, 85622 Feldkirchen, Germany;Department of Electrical Engineering, Federal University of Santa Catarina展开
System & Verification Group, Cadence Design Systems GmbH, 85622 Feldkirchen, Germany;Department of Electrical Engineering, Federal University of Santa Catarina (UFSC), Florianópolis 88040-900, Brazil;Graduate Program in Applied Computer Science, University of Vale do Itajaí (UNIVALI), Itajaí 88302-901, Brazil;COPELABS—Lusófona University of Humanities and Technologies, Campo Grande 376, 1749-024 Lisboa, Portugal;VALORIZA, Research Center for Endogenous Resources Valorization, Instituto Politécnico de Portalegre, 7300-555 Portalegre, Portugal
摘要
The increasing complexity of System-on-Chip (SoC) and the ongoing technology miniaturization on Integrated Circuit (IC) manufacturing processes makes 更多..
